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SERIAL PRESENCE DETECT
MR16R0824(6/8/C/G)BN1 RAMBUS MODULE
RIMM SPD Specification based on 128M RDRAM(B-die, 32s banks)
Version 1.1 October 2000
Change History
Version 1.1 (Oct. 00)
Based on the Samsung 128M RDRAM (A-die) SPD Specification 1.02 version.
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Version 1.1 Oct. 2000
SERIAL PRESENCE DETECT
MR16R0824(6/8)BN1-CK8/CK7/CG6
* Feature : Single Sided Module & 1,250 mil height * Composition : 8Mx16 *4(6/8)pcs * Used component type & part number 1 Normal Package (K4R271669B-NCK8/NCK7/NCG6) * # of banks in component : 32s banks (Doubled with Split Banks) * Refresh : 16K/32ms * Contents ;
Byte # (Dec) 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 Described Function SPD Revision Level Total Number of Bytes in the SPD Device Type Module Type Row Address Bits[3:0], Column Address Bits[3:0] Bank Address Bits and Type Refresh Bank Bits Refresh Period(=tREF) Protocol Version Misc. Device Configuration Field Minimum Precharge to RAS time(=tRP-R,Min ) Minimum RAS to Precharge time(=tRAS-R,Min) Minimum RAS to CAS time(=tRCD-R,Min) Minimum RAS to RAS time(=tRR-R,Min) Minimum Precharge to Precharge time(=tPP-R,Min) Min tCYCLE for Range A Max tCYCLE for Range A tCDLY Range for Range A tCLS and tCAS Range for Range A Min tCYCLE for Range B Max tCYCLE for Range B tCDLY Range for Range B tCLS and tCAS Range for Range B Min tCYCLE for Range C Max tCYCLE for Range C tCDLY Range for Range C tCLS and tCAS Range for Range C Min tCYCLE for Range D Max tCYCLE for Range D tCDLY Range for Range D tCLS and tCAS Range for Range D Power Down Exit Max.time, Phase A(=tPDNXA,Max) Power Down Exit Max.time, Phase B(=tPDNXB,Max) Nap Exit Max.time, Phase A(=tNAPXA,Max) Nap Exit Max.time, Phase B(=tNAPXB,Max) fIMIN[11:8] fIMAX[11:8] fIMIN[7:0] fIMAX[7:0] ODF mapping Option Field Width 8 8 8 8 4,4 8 3 8 8 8 5 6 5 5 5 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 4 4 8 8 Units LUT LUT LUT LUT bits LUT bits ms LUT n/a 1/fRAS 1/fRAS 1/fRAS 1/fRAS 1/fRAS 128ps 128ps tCYCLE tCYCLE 128ps 128ps tCYCLE tCYCLE 128ps 128ps tCYCLE tCYCLE 128ps 128ps tCYCLE tCYCLE us 64tCYCLE ns ns MHz MHz MHz 261MHz 400MHz 261MHz 400MHz
MR16R0824(6/8/C/G)BN1 RAMBUS MODULE
MR16R082C(G)BN1-CK8/CK7/CG6
* Feature : Double Sided Module & 1,250 mil height * Composition : 8Mx16 *12(16)pcs * Used component type & part number 1 Normal Package (K4R271669B-NCK8/NCK7/NCG6) 2 Mirrored Package (K4R271669B-MCK8/MCK7/MCG6) * # of banks in component :32s banks (Doubled with Split Banks) * Refresh : 16K/32ms
Supported Function K8 K7 SPD Revision 1.0 256 Bytes Direct RDRAM RIMM Module 9 bits, 6 bits 32s banks 32 Refresh Bank Sets 32ms Protocol Version 1 DQS=1.5, no -LP, S28, S3 8cycles 20cycles 10cycles 8cycles 8cycles 2.50ns 3.83ns 8cycles 20cycles 8cycles 8cycles 8cycles 2.80ns 3.83ns 8cycles 20cycles 8cycles 8cycles 8cycles 3.33ns 3.83ns 08h 14h 0Ah 08h 08h 13h 1Eh 59h G6 K8
Hex Value K7 02h 08h 01h 01h 96h C5h 05h 20h 02h 05h 08h 14h 08h 08h 08h 15h 1Eh 59h AAh 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 00h 04h 8Dh 32h 28h 08h 14h 08h 08h 08h 1Ah 1Eh 59h G6
Note 1 1 1 1 1
1 3
5tCYCLE 5tCYCLE 5tCYCLE ~ 9tCYCLE ~ 9tCYCLE ~ 9tCYCLE 2tCYCLE for tCLS & tCAS RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU RFU 4us 9000tCYCLE 50ns 40ns 261MHz 357MHz 261MHz 357MHz 261MHz 300MHz 261MHz 300MHz
2 2 2 2 2 2 2 2 2 2 2 2
11h 05h 90h
11h 05h 65h 00h
11h 05h 2Ch
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Version 1.1 Oct. 2000
SERIAL PRESENCE DETECT
Byte # (Dec) 39 40 41 42 43 44 45 46 47~49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65~71 72 73 74 75 76 77 78 79 80 81 82 Described Function Option Field Width 8 8 8 8 8 4,4 4,4 4,4 4 8 1,1,6 1,1,6 8 8 8 8 8 8 8 8 8 56 8 8 8 8 8 8 8 8 8 8 4d 6d 8d 12d 16d 83 84 85 86 87 88 89 90 Module Part Number(Component Revision) Module Part Number(Package Type) Module Part Number(PCB Revision) Module Part Number(Hyphen) Module Part Number(Power) Module Part Number(tRAC & Speed) Module Part Number(tRAC & Speed) Module Part Number(RFU) 8 8 8 8 8 8 8 8 8 8 8 8 8 Units ms ms tCYCLE us us tCYCLE tCYCLE tCYCLE MHz MHz C C 1mA 2mA 8mA 1mA 2mA 8mA 128uA n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a n/a C K 8 400MHz K8
MR16R0824(6/8/C/G)BN1 RAMBUS MODULE
Supported Function K7 100ms 100ms 150tCYCLE 64us 10us 6tCYCLE, 6tCYCLE 5tCYCLE, 5tCYCLE 5tCYCLE, 13tCYCLE 357MHz 300MHz 01h 90h 0,0,100C 0,0,100C 0,0,100C 1,0, 92C 105mA 165mA 575mA 80mA 135mA 410mA 4.0mA 1,0,92C 100mA 155mA 525mA 80mA 135mA 410mA 4.0mA Samsung Samsung Onyang Korea M R 1 6 R Blank 0 8 2 4 6 8 C G B N 1 - (Hyphen) C K 7 C G 6 43h 4Bh 38h 86h 1,0,92C 90mA 140mA 455mA 80mA 135mA 410mA 4.0mA 24h 9Ch 69h 52h 47h 50h 43h 33h 1Fh G6 K8 Hex Value K7 64h 64h 96h 40h 0Ah 66h 55h 5Dh 00h 01h 65h 24h 9Ch 64h 4Dh 41h 50h 43h 33h 1Fh 00h 00h 20h CEh 00h 01h 4Dh 52h 31h 36h 52h 20h 30h 38h 32h 34h 36h 38h 43h 47h 42h 4Eh 31h 2Dh 43h 4Bh 37h 00h 43h 47h 36h 99h 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 01h 2Ch 24h 9Ch 5Ah 46h 38h 50h 43h 33h 1Fh G6 Note
Max. time between Current Control(=tCCTRL,Max) Max. time between Temp. Calibration(=tTEMP,Max) Min. time between Temp. Calibration Enable and Command(=tTCEN,Min) Maximum RAS to Precharge time(=tRAS-R,Max) Maximum time that a Device can stay in Nap Mode(=tNLIMIT,Max) ACTREFPT[3:0], PCHREFPT[3:0] CPCHREFPT_DC[3:0], RDREFPT_DC[3:0] RETREFPT_DC[3:0], WRREFPT_DC[3:0] Reserved fRAS[11:8] fRAS[7:0] PMAX,HI, PMAX,LO, Tj HeatSpreader, thermal sensor, Tplate PSTBY,HI PACTI,HI PACTRW,HI PSTBY,LO PACTI,LO PACTRW,LO PNAP PRESA (Reserved for a future thermal parameter) PRESB (Reserved for a future thermal parameter) Checksum for bytes 0 ~ 62 Module Manufacturer ID Code ...... Module Manufacturer ID Code Module Manufacturer Location Module Part Number(Memory module) Module Part Number(Module Configuration) Module Part Number(Data Bits) ...... Module Part Number(Data Bits) Module Part Number(Feature) Module Part Number(Module Density) Module Part Number(Module Density) ...... Module Part Number(Module Density) Module Part Number (Refresh, # of banks in comp. & interface) Module Part Number(# of component )
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Version 1.1 Oct. 2000
SERIAL PRESENCE DETECT
Byte # (Dec) 91 92 93 94 95~98 99 Described Function Module Manufacturer Revision Code (PCB) ...... Component Manufacturer Revision Code Module Manufacturing Year Module Manufacturing Week Module Serial Number Number of Devices on Module 4d 6d 8d 12d 16d 100 101 Module Data Width Devices Enables 4d 6d 8d 12d 16d 102 ...... Devices Enables 4d 6d 8d 12d 16d 103~104 ...... Devices Enables 105 106 114 115 116 117 118 119 120 121 122 123 124 125 126 127 Module Vdd[3:0], Module Voltage Interface Level[3:0] Module Vdd Tolerance CDLY0/1 for tCDLY=3 CDLY0/1 for tCDLY=4 CDLY0/1 for tCDLY=5 CDLY0/1 for tCDLY=6 CDLY0/1 for tCDLY=7 CDLY0/1 for tCDLY=8 CDLY0/1 for tCDLY=9 CDLY0/1 for tCDLY=10 CDLY0/1 for tCDLY=11 CDLY0/1 for tCDLY=12 CDLY0/1 for tCDLY=13 CDLY0/1 for tCDLY=14 CDLY0/1 for tCDLY=15 Checksum for Bytes 99 ~ 126 4d 6d 8d 12d 16d 128 + Open for Customer Use Option Field Width 8 8 8 8 32 6 6 6 6 6 8 8 8 8 8 8 8 8 8 8 8 16 4,4 8 56 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 Units n/a n/a n/a n/a n/a devices devices devices devices devices bits bits bits bits bits bits bits bits bits bits bits bits LUT LUT tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE tCYCLE n/a n/a n/a n/a n/a K8
MR16R0824(6/8/C/G)BN1 RAMBUS MODULE
Supported Function K7 1 B (B die) 4 6 8 12 16 16bits All 4 devices are enabled All 6 devices are enabled All 8 devices are enabled All 12 devices are enabled All 16 devices are enabled All 4 devices are enabled All 6 devices are enabled All 8 devices are enabled All 12 devices are enabled All 16 devices are enabled 2.5V, 1.8V Vterm 5% DC, 2% AC 3/0 3/1 3/2 4/2 5/2 G6 K8 Hex Value K7 31h 42h 04h 06h 08h 0Ch 10h 10h 0Fh 3Fh FFh FFh FFh 00h 00h 00h 0Fh FFh 00h 10h 52h 00h 00h 00h 30h 31h 32h 42h 52h 00h 00h 00h 00h 00h 00h ACh DEh A0h B3h A7h Undefined 3 3 1 1 G6 3 3 3, 4 3, 4 3, 5 Note
107~113 Reserved
1. Please refer to Look-Up Table (LUT) in the Direct Rambus TM SPD specification 1.0 2. It is reserved to future use (RFU). 3. Unit is not available ( n/a). 4. These bytes are programmed by code of Date Week & Date Year with binary format. 5. These bytes are programmed by Samsung' own Module Assembly Serial # system. All modules may have unique serial #. s
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Version 1.1 Oct. 2000

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